As is known, the processes for manufacturing semiconductor wafers of a silicon-on-insulator (SOI) type are costly, because in most cases they require the use of two starting substrates, which are bonded to one another, for each unit of finished product (final SOI wafer).
Processes have also been proposed, which, starting from an individual wafer, enable a buried oxide layer to be provided, arranged between two monocrystalline semiconductor layers (a substrate and an epitaxial layer). These processes envisage opening a plurality of trenches, for example arranged in a comb-like configuration, in a semiconductor substrate (for example, monocrystalline silicon), except along scribing lines. Then, the trenches are closed by growth of a monocrystalline epitaxial layer. Buried cavities are thus formed, which are remodeled by a thermal “annealing” process. Annealing exploits the deoxidizing atmosphere rich in hydrogen, which has remained trapped inside the buried cavities during the epitaxial growth. During this step, the silicon delimiting the buried cavities redistributes according to a minimum-energy configuration, and the walls that separate adjacent buried cavities are thinned out. The cavities assume the form of channels having a substantially circular cross section, which separate the substrate from the epitaxial layer. After opening trenches that enable access to the buried channels from outside, a thermal oxidation step is carried out, in which the walls between adjacent buried channels are completely converted into silicon oxide. In addition, the oxide grows towards the inside of the buried channels, which are thus filled. In this way, an oxide layer that is substantially continuous and of controlled thickness is obtained, arranged between the substrate and the epitaxial layer.
The SOI wafers thus made are very well suited for providing integrated circuits, both on account of the high crystallographic quality of the epitaxial layer and on account of the high insulation from the substrate.
Very often, however, it is useful to integrate, in the same semiconductor die, also power devices, which, during normal operation, cause a considerable heating and can lead to problems of heat dissipation. In these cases, SOI-type insulation is disadvantageous because the continuous buried oxide layer hinders dispersion of the heat through the substrate.